1. Field of the Invention
The present invention generally relates to semiconductor memory devices, and more particularly to a semiconductor memory device that comprises one or a plurality of parallel semiconductor memories which simultaneously input or output data with a plurality of bits, and a controller which serves to perform a parallel/serial conversion.
2. Description of the Related Art
Conventionally, a small-sized memory card usually has a bus width the same as or several times wider than a memory (memories) provided on the memory card does (do). Mostly, the memory card simultaneously inputs and outputs data with a plurality of bits, that is, the memory card performs a parallel operation with respect to the inputting/outputting of the data.
FIG. 1 shows an example of the conventional parallel memory card. As shown in this diagram, the conventional parallel memory card comprises a memory 101 and a printed substrate 102 on which the memory 101 is provided.
The memory 101 has a plurality of data inputting-and-outputting terminals D1 through Dn and a control terminal CTRL consisting of a plurality of control signals of the memory 101, for example, consisting of a clock signal, a data-direction-determining signal. The printed substrate 102 has a plurality of data inputting-and-outputting terminals 104-1 through 104-n and a control terminal 103 consisting of a plurality of control signals of the printed substrate 102.
The plurality of data inputting-and-outputting terminals 104-1 through 104-n are coupled to the plurality of data inputting-and-outputting terminals D1 through Dn, respectively. The control terminal CTRL of the memory 101 is coupled to the control terminal 103 of the printed substrate 102.
A host reads/writes data from/into the memory 101 via the data inputting-and-outputting terminals 104-1 through 104-n and the control terminal 103.
In recent years, with increasing demand for miniaturization of the memory card, the memory cards have been downsized more and more. In order to support this situation, a memory card that operates serially is provided. Such a serial memory card comprises a memory operating parallel and a controller serving to perform a parallel/serial conversion. Since the serial memory card communicates serially with the host, the number of the memory card can be reduced and as a result the memory card can be further downsized.
FIG. 2 is a diagram showing an example of the conventional memory card operating serially.
As can be seen from FIG. 2, the serial memory card comprises the memory 101, the printed substrate 102 and a controller 201.
The controller 201 includes a parallel/serial conversion circuit 202 and an input-and-output control circuit 203. The parallel/serial conversion circuit 202 has a plurality of parallel terminals coupled to the respective data inputting-and-outputting terminals D1 through Dn. Also, The parallel/serial conversion circuit 202 has a serial terminal coupled to a serial terminal 205 of the printed substrate 102.
The host sends a control signal 204 to the control terminal CTRL of the memory 101 via the input-and-output control circuit 203 of the controller 202. Also, the host writes/reads data into/from the memory 101 installed on the memory card according to a serial control protocol of the controller 201.
However, in a case of a test for the serial memory card in production thereof, the test has to be performed by serially writing/reading data into/from the serial memory card as previously described. This case brings about a problem that test time is increased and as a result test cost is increased as well, because if the serial memory card having a memory with a data width of 8 bits, the test time thereof is 8 times as long as that of a parallel memory card having the same memory.